1. Field of the Invention
The present invention relates to a semiconductor storage device using nonvolatile memory as a storage medium and, more particularly, to a semiconductor storage device using nonvolatile memory such as block-erase type flash memory.
2. Description of the Prior Art
In a semiconductor storage device using block-erase type nonvolatile memory, for example, flash memory, the flash memory can write or read data only in steps of 8 bits or 16 bits. In contrast to this, a host system unit comprising information processing equipment or the like that makes access to the semiconductor storage device performs data transfer in steps of, for example, 512 B. Therefore, the semiconductor storage device is equipped with one sector buffer as buffer memory for temporarily storing data.
However, while the flash memory is performing data write or data erase, data within the sector buffer cannot be erased so that the host system unit has to stop the next data transfer operation, being on standby. This would involve longer time for data erase and write operations, as a problem.
Thus, there has been disclosed, in Japanese Patent Laid-Open Publication No. 6-259320, a nonvolatile memory device in which a plurality of buffer memories of the same size as the sector size, which is the reprogramming unit of the nonvolatile memory, are provided and associated with the same number of nonvolatile memory blocks in one-to-one correspondence, thus allowing data write and read operations to be performed. This known nonvolatile memory device has a constitution that, during data write operation, the activities of individual sectors of the memory blocks are selected and controlled while being shifted on time base, in the unit of at least one sector within the memory blocks. Using this constitution allows data transfer to be achieved more efficiently and more effectively, as compared with those in which only one sector buffer is provided.
However, in this known nonvolatile memory device, in which a plurality of memory blocks and the buffer memories are associated with each other in one-to-one correspondence, when the memory blocks each having a 2 KB sector size are provided in 8 lines, as an example, the buffer memory in the nonvolatile memory device needs to be sized 16 KB. This would involve increased cost as a problem.
Also, the data transfer time from buffer memory to nonvolatile memory in the data write process to the nonvolatile memory is much shorter than the time of data write operation, i.e., the time of charge injection to or discharge from the floating gates of memory cells. That is, after the data transfer from a buffer memory to its corresponding memory block, although the buffer memory is ready to accept the next data, the buffer memory corresponding to the memory block will not be usable until a command for data write to the corresponding memory block is issued from the host system unit, because of the one-to-one correspondence between buffer memories and memory blocks. This would involve another problem of worsened efficiency of use of the buffer memories.